1. Field of the Invention
The present invention relates to a method for resetting a plasma display panel, and more particularly, to a resetting method for erasing wall charges remaining around first display electrodes and second display electrodes in a second sub-field following a first sub-field, after applying a final sustain discharge voltage between the first and second display electrodes in the first sub-field of the plasma display panel.
2. Description of the Related Art
FIG. 1 shows an electrode line pattern of a general plasma display panel, and FIG. 2 is a schematic cross section of a pixel of the pattern shown in FIG. 1. Referring to the drawings, in a general surface-discharge plasma display panel, address electrode lines A1, A2, A3, . . . and Am, a first dielectric layer 21, phosphors 22, scan electrode lines Y1, Y2, . . . . and Yn-1 (231 and 232 in FIG. 2), common electrode lines X, (241 and 242 in FIG. 2), a second dielectric layer 25 and a protective film 26 are provided. The respective scan electrode lines Y1, Y2, . . . and Yn-1 are comprised of a scanning indium tin oxide (ITO) electrode line 231 and a scanning bus electrode line 232, as shown in FIG. 2. Similarly, the common electrode lines X are comprised of a common ITO electrode line 241 and a common bus electrode line 242. A gas for forming plasma is hermetically sealed in a space between the protective film 26 and the first dielectric layer 21.
The address electrode lines A1, A2, A3, . . . and Am are coated on a lower substrate (not shown) as a first substrate in a predetermined pattern. The first dielectric layer 21 is entirely coated over the address electrode lines A1, A2, A3, . . . and Am. The phosphors 22 are coated on the first dielectric layer 21 in a predetermined pattern. In some cases, the first dielectric layer 21 may not be formed. Instead, the phosphors 22 may be coated over the address electrode lines A1, A2, A3, . . . and Am in a predetermined pattern. The scan electrode lines Y1, Y2, . . . , Yn-1, 231 and 232 and the common electrode lines X, 241 and 242 are arranged on an upper substrate (not shown) as a second substrate to be orthogonal to the address electrode lines A1, A2, A3, . . . and Am in a predetermined pattern. The respective intersections define corresponding pixels. The second dielectric layer 25 is entirely coated over the scan electrode lines Y1, Y2, . . . , Yn-1, 231 and 232 and the common electrode lines X, 241 and 242. The protective film 26 for protecting the panel against a strong electrical field is entirely coated over the second dielectric layer 25.
The driving method generally adopted to the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining in the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixels at which the wall charges are formed in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X and the scan electrode lines Y1, Y2, . . . , Yn-1 and Yn, a surface discharge occurs at the pixels at which the wall charges are formed. Here, plasma is formed at the gas layer of the discharge space between the protective film 26 and the first dielectric layer 21 and the phosphors 22 are excited by ultraviolet rays to thus emit light.
For adoption of the address/display separation driving method, conventionally, a first voltage of a high level is applied between the scan electrode lines Y1, Y2, . . . , Yn-1, 231 and 232 and the common electrode lines X, 241 and 242, and the scan electrode lines Y1, Y2, . . . , Yn-1, 231 and 232 and the common electrode lines X, 241 and 242 are made to be at the same electric potential. Accordingly, a first discharge is performed by the first voltage and a second discharge is performed by accumulated wall charges so that the wall charges are erased.
According to the conventional resetting method, first and second discharges occur strongly at all pixels. Therefore, light of a high intensity is produced at unselected pixels of the current sub-field, which deteriorates the contrast of the plasma display panel.